Document Type

Patent

Publication Date

6-12-2007

Patent Number

7231578

CPC

G11B 20/18 (20130101); H04L 1/0071 (20130101); H04L 1/0057 (20130101); H04L 1/0064 (20130101); H04L 1/0045 (20130101); G11B 2020/1843 (20130101)

Abstract

Techniques for detecting and correcting burst errors in data bytes formed in a two-level block code structure. A second level decoder uses block level check bytes to detect columns in a two-level block code structure that contain error bytes. The second level decoder generates erasure pointers that identify columns in the two-level block structure effected by burst errors. A first level decoder then uses codeword check bytes to correct all of the bytes in the columns identified by the erasure pointers. The first level decoder is freed to use all of the codeword check bytes only for error byte value calculations. The first level decoder does not need to use any of the codeword check bytes for error location calculations, because the erasure pointers generated by the second level decoder provide all of the necessary error locations. This techniques doubles the error correction capability of the first level decoder.

Application Number

10/817,421

Assignees

Hitachi Global Storage Technologies Netherlands B.V. (AZ Amsterdam, NL)

Filing Date

04/02/2004

Primary/U.S. Class

714/762; G9B/20.046

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