Exploration Of Real-Time Power Electronic Simulation on AMD NPU

Author

• Shouyu Du, Clemson UniversityFollow

Date of Award

5-2026

Document Type

Thesis

Degree Name

Master of Science in Engineering (MSE)

Department

Electrical and Computer Engineering (Holcomb Dept. of)

Committee Chair/Advisor

Tao Wei

Committee Member

Fatemeh Afghah

Committee Member

Jon Calhoun

Abstract

The rapid electrification of the automotive and data center sectors has created a critical demand for high-fidelity, real-time simulation of complex power electronic systems. While Hardware- in-the-Loop (HIL) simulation on Field-Programmable Gate Arrays (FPGAs) is the current industry standard, it presents significant challenges regarding development complexity and memory limita- tions. This dissertation investigates the feasibility of utilizing Neural Processing Units (NPUs)— specifically the AMD AI Engine (AIE) XDNA2 architecture—as a novel platform for real-time, deterministic circuit simulation. This study establishes a comprehensive automated modeling framework based on graph theory and Massarini’s method to derive linear state-space representations for arbitrary circuit topologies, capable of handling ideal switching events and Dirac impulses. To evaluate the hardware’s capabilities, a Half-Bridge LLC Resonant Converter was simulated using two distinct memory management architectures: a Matrix Cached implementation and a Runtime Matrix Fetching implementation. Experimental results conducted on an AMD Ryzen AI 9 HX 370 processor demonstrate that the Matrix Cached implementation achieves a deterministic iteration time of approximately 0.5 µs, meeting the stringent real-time requirements for high-frequency power electronics. Conversely, the Runtime Matrix Fetching approach revealed significant bottlenecks due to driver latency and cache misses. The study concludes that while the AIE architecture is currently compute-bound due to emulated floating-point arithmetic, it offers a viable, flexible alternative to FPGAs for simulations that fit within localized memory.

Recommended Citation

Du, Shouyu, "Exploration Of Real-Time Power Electronic Simulation on AMD NPU" (2026). All Theses. 4790.
https://open.clemson.edu/all_theses/4790