Document Type

Article

Publication Date

2-1993

Publisher

Oak Ridge National Laboratory

Abstract

Kendall Square Research introduced the KSRl system in 1991. The architecture is based on a ring of rings of 64bit microprocessors. It is a distributed, shared memory system and is scalable. The memory structure is unique and is the key to understanding the system. Different levels of caching eliminates physical memory addressing and leads to the ALLCACHE TM scheme. Since requested data may be found in any of several caches, the initial access time is variable. Once pulled into the local (sub)cache, subsequent access times are fixed and minimal. Thus, the KSRl is a Cache-Only Memory Architecture (COMA) system. This paper describes experimentation and an analytic model of the KSRI. The focus is on the poststore programmer option. With the poststore option, the programmer can elect to broadcast the updated value of a variable to all processors that might have a copy. This may save time for threads on other processors, but delays the broadcasting thread and places additional tr&c on the ring. The specific issue addressed is to determine under what conditions poststore is beneficial. The analytic model and the experimental observations are in good agreement. They indicate that the decision to use poststore depends both on the application and the current system load.

Comments

This article has been placed in the public domain courtesy of Oak Ridge National Laboratory, U.S. Dept. of Energy.

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